1. Field of the Invention
The present invention relates generally to processors, and in particular to synchronizing trace data in a computing system.
2. Description of the Related Art
Many of the integrated circuits such as, for example, systems on chips (SoCs) and processors, being developed today include multiple functional units (or “blocks”) such as processor cores, bridge units, graphics processing units, and so on. As the number of functional units per device increases, it becomes more difficult to analyze the behavior of the system. To help with software development, the debug process, and performance analysis of these systems, various functional units may generate trace data which can be post-processed to analyze the behavior of the system.
A trace stream of data representing the step-by-step activity in a SoC is a highly useful tool in system development. For example, tracing the activity of the system may involve: tracking the contents of registers, tracking the values stored at particular locations in cache and/or external memory, tracking the values of internal signals, and monitoring the status bus lines, paths or modules associated with a processor core. Trace streams may also be generated to include a history of instructions that have been executed (e.g., a stream of instruction pointer values). A debug module or post-processing software may then use these trace streams to identify which instructions were executed, the contents of various registers, and so on.
One of the challenges in systems containing multiple functional units is synchronizing the trace entries from the various blocks, particularly when they are running at different clock frequencies. Adding to this challenge, clock frequencies may change dynamically, and some blocks may be unaware of their own clock frequency. Therefore, there is a need in the art to be able to time-correlate trace streams from multiple independent sources running at different clock frequencies. Also, it is desirable to capture only the minimum amount of extra data necessary that will be needed to adequately understand the system's behavior.